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Patent Title: Arbitration protocol for a bidirectional bus for handling access requests to a logically divided memory in a multiprocessor system

Assignee: IBM
Patent Number: US5594876
Issue Date: 01-14-1997
Application Number:
File Date:07-27-1995

Abstract: The invention concerns a multiprocessor system comprising processors PU0 to PUn and a common main memory. The memory is logically divided into at least two banks M0 and M1 and is interconnected with the processors by a bus 110. By means of control lines 111 to 118 a bus protocol is established so that one of said memory banks is accessed while another one of said banks is still busy.

Notes:

Link to USPTO

IBM Pledge dated 1/11/2005