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Patent Title: Selective shadowing and paging in computer memory systems

Assignee: IBM
Patent Number: US5603011
Issue Date: 02-11-1997
Application Number:
File Date:11-18-1994

Abstract: Principal data (e.g. frequently accessed data such as video BIOS program information and a principal font set) and secondary data (e.g. secondary font sets) are permanently stored in a slow memory device (e.g. EPROM). To improve performance, the principal data but not the secondary data is copied initially to a faster access memory device (shadow RAM). Translating logic associated with the latter device is initially configured to intercept memory requests, having addresses in a range preassigned to the EPROM, and redirect them to shadow RAM. However, in order to allow for access to the secondary data, the redirection function of the translating logic can be disabled and re-enabled, under control of programs running in an associated computer, so that requests in the preassigned address range are routed directly to the EPROM. When the translating logic is disabled, all of the EPROM becomes accessible including locations containing the principal data and locations containing the secondary data. When the translating logic is enabled, only the principal data in the shadow RAM is accessible. The disabling and re-enabling functions are implemented presently by means of unique function calls issuable to system BIOS by operating system, device driver and application programs. In the disclosed embodiment, the size of the principal data is that of a page block, shadow RAM stores the principal data page and only that page, and the capacity of EPROM is sufficient to store the two or more page blocks of (principal and secondary) data.


Link to USPTO

IBM Pledge dated 1/11/2005