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Patent Title: Methods and systems for merging data during cache checking and write-back cycles for memory reads and writes

Assignee: IBM
Patent Number: US5627993
Issue Date: 05-06-1997
Application Number:
File Date:04-29-1996

Abstract: Methods and system for memory control in a computer system having a store-in cache. In response to main memory read or write requests from a secondary processor, data is transferred into a buffer during a snoop cycle to the store-in cache. The data in the buffer is merged with write-back data from the store-in cache in a write operation. Data is provided directly from the buffer to the secondary processor and to main memory in a read operation. The buffer can be placed on a memory controller of the computer system. A second store-in cache can also be used for main memory transfers.


Link to USPTO

IBM Pledge dated 1/11/2005