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Patent Title: Apparatus and method for facilitating out-of-order execution of load instructions

Assignee: IBM
Patent Number: US6266767
Issue Date: 07-24-2001
Application Number:
File Date:04-22-1999

Abstract: A processor (100) includes a preload queue (160) for storing a plurality of preload entries. Each preload entry is associated with a preload instruction and includes the address and byte count defined by the respective preload and an identifier associated with the respective preload. A comparison unit (170) associated with the preload queue (160) identifies each conflicting preload entry, that is, each preload entry associated with a preload instruction that conflicts with an older store instruction. The oldest preload instruction associated with one of the conflicting preload entries represents a target preload. The processor (100) may flush this target preload along with all instructions executed after the target preload in order to correct for the conflict between the target preload and store instruction.


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IBM Pledge dated 1/11/2005