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Patent Title: Method and system for eliminating operation codes from intermediate prolog instructions

Assignee: IBM
Patent Number: US5274820
Issue Date: 12-28-1993
Application Number:
File Date:08-19-1992

Abstract: An improved architecture for a Prolog interpreter is described. Implicit arguments are substituted for classical explicit arguments. The implicit arguments are supported by preassigned register allocation managed by the interpreter. The interpreter also exploits improved Prolog Object processing in which the first bit of the Prolog object word is used as a flag to indicate whether the object word is a type pointer or type descriptor. Significant improvements in interpreter execution result from the usage of these techniques.


Link to USPTO

IBM Pledge dated 1/11/2005